LLM-aided Test Generation for Custom Neural Network Hardware Accelerators

dc.contributor.author	Peccia, Federico Nicolás
dc.contributor.author	Hald, Tobias
dc.contributor.author	Bringmann, Oliver
dc.date.accessioned	2025-08-22T12:45:18Z
dc.date.available	2025-08-22T12:45:18Z
dc.date.issued	2025-05-30
dc.identifier.isbn	979-8-3315-9450-3
dc.identifier.issn	1558-1780
dc.identifier.uri	http://hdl.handle.net/10900/169393
dc.language.iso	en	de_DE
dc.publisher	IEEE	de_DE
dc.relation.uri	https://ieeexplore.ieee.org/abstract/document/11049634	de_DE
dc.subject.ddc	004	de_DE
dc.title	LLM-aided Test Generation for Custom Neural Network Hardware Accelerators	de_DE
dc.type	Article	de_DE
utue.personen.roh	Peccia, Federico Nicolás
utue.personen.roh	Hald, Tobias
utue.personen.roh	Bringmann, Oliver
dcterms.isPartOf.ZSTitelID	2025 IEEE European Test Symposium (ETS)	de_DE